Highly Efficient, Scalable Vision and AI Processors IP for the Edge


Where: Exhibit Hall ET 1

Date:  Day 2

Start Time: 2:45 pm

End Time: 3:15 pm

This presentation describes the architecture of the latest Tensilica-based vision and AI processor family, and illustrates how easily vision (e.g., SLAM, 3D capture) algorithms and AI inference can be implemented on these processors. See how this low-power architecture simplifies development of a scalable vision and AI solution from low to high end for mobile, AR/VR, surveillance and automotive markets.

Track

Session Speakers

  • Pulin Desai is director of product marketing in Cadence’s IP Group. He is in charge of product marketing, management and business development of the company’s Tensilica® Vision DSP product line. Vision products provide highly programmable, high-performance, low-power solutions for the embedded vision and AI applications in mobile, wearable, automotive, security camera and gaming markets. Desai brings more than 20 years of semiconductor marketing experience to his role. He has worked in the microprocessor, graphics, flat panel, image processor and sensor markets in product marketing/management and applications engineering capacities. He holds BS and MS degrees in electrical engineering from San Jose State University.


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Highly Efficient, Scalable Vision and AI Processors IP for the Edge