Date: Tuesday, May 17 (Main Conference Day 1)
Start Time: 4:50 pm
End Time: 5:20 pm
As AI applications move from cloud platforms into edge devices, processor designers are increasingly incorporating hardware accelerators for real-time AI processing. These accelerators must meet tight cost, bandwidth and power consumption constraints, while still delivering the high performance needed by consumer, automotive and industrial system developers. In this talk, we introduce Expedera’s revolutionary packet-based AI accelerator architecture. We illustrate how this novel architecture eliminates bandwidth bottlenecks that limit conventional architectures, leading to significantly better performance and efficiency.