Date: Wednesday, May 18 (Main Conference Day 2)
Start Time: 11:25 am
End Time: 11:55 am
Machine learning is not new—the term was first coined in 1952. Its explosive growth over the past decade has not been the result of technical breakthroughs, but instead of available compute power. Similarly, its future potential will be determined by the amount of compute power that can be applied to an ML problem within the constraints of allowable power, area and cost. The key to increasing computation power is properly pairing hardware and software to effectively exploit parallelism. The Flex Logix InferX X1 accelerator is a system designed to fully utilize parallelism by teaming software with parallel hardware that is capable of being reconfigured based on the specific algorithm requirements. In this talk, we will explore the hardware architecture of the InferX X1, the associated programming tools, and how the two work together to form a cost-effective and power-efficient machine learning system.