Date: Wednesday, May 24
Start Time: 2:40 pm
End Time: 3:10 pm
The trend of pushing AI/ML capabilities to the edge brings design challenges around the need to combine high-performance computing (for AI/ML algorithms) with low power consumption (to enable battery-powered sensing systems). Designers are often faced with a choice between using an applications processor that lacks the required performance or exceeds the system power or cost budget, or using a GPU or NPU, which can yield power consumption in watts and battery life in minutes. Neither of these approaches is suitable for size-constrained, battery-powered, always-on edge AI/ML systems. Using a case study of Avnet’s new smart sensing RASynBoard, we’ll explore several architecture and component selection trade-offs to enable always-on sensing capability. We’ll explain several novel design techniques, from clock gating to power partitioning. Join us to gain a better understanding of how you can add deep learning capabilities to your next design while reducing power to extend battery life and minimizing the size and cost of your smart product.