About the Workshop

This hands-on workshop shows developers how to build, port and deploy vision-based edge AI systems on AMD processors. You’ll build a complete perception pipeline on AMD Ryzen AI hardware and software:

• Camera input
• Object detection on the NPU
• Scene understanding with a vision-language model on the iGPU
• A decision at the end, such as raising an alert, flagging a defect or directing a machine

Along the way, you’ll measure how splitting the work across the CPU, iGPU and NPU affects latency, throughput, power and memory use and also learn what it takes to move existing CUDA code to AMD.

Who Should Attend

This workshop is for engineers and technical leads building camera-based systems that must run AI efficiently outside the data center. Examples include:

• Retail analytics and loss prevention
• Railway and traffic monitoring
• Safety systems for mining, industrial and off-road vehicles
• Factory inspection
• Security and smart-home cameras
• Fleet and driver monitoring
• Agricultural equipment
• Medical and patient-monitoring devices
• Robots and drones

It’s equally relevant whether your system runs on an embedded device, a smart camera or an on-premise server. It’s also for developers evaluating a move of existing NVIDIA-based code to AMD.

Workshop Outline

1. Deploy vision AI on a heterogeneous processor

Run detection models on the NPU using ONNX Runtime, and run multimodal vision-language models on the iGPU using ROCm and Python. See how the vision and language stages combine to turn what a camera sees into an actionable decision, and how offloading inference to the NPU frees the CPU and iGPU for other work.

2. Migrate existing CUDA code to AMD ROCm

Port CUDA kernels to HIP, including the hard cases automatic tools miss, then build, run and validate them on the AMD RDNA iGPU in Ryzen AI. Topics include:

• Fast, repeatable bulk conversion with HIPIFY
• CUDA to HIP concept mapping (execution and memory models)
• Library migration to the HIP equivalents of cuBLAS, cuBLASLt, cuFFT, cuRAND, cuSPARSE and CUB
• AI assisted porting for the cases that need judgment: Tensor Core code with rocWMMA, warp size assumptions, and inline PTX rewritten as portable HIP, demonstrated live and validated on the iGPU.

These techniques apply across AMD RDNA iGPUs. This workshop builds and validates on AMD Ryzen AI hardware.

3. From cloud training to edge deployment

See how models are fine-tuned on your own data in the cloud and deployed back to the device. For robots and autonomous machines, you’ll also see how reinforcement learning in GPU-accelerated simulation fits into the workflow with open-source simulators.

4. Q&A

Attendees Will Leave With

• A working camera-to-decision vision pipeline that splits inference across an NPU and iGPU, plus measured data on the trade-offs
• Practical know-how for running detection models on the Ryzen AI NPU with ONNX Runtime, and vision-language models on the iGPU with ROCm
• A practical understanding of how to migrate CUDA applications to AMD GPUs using ROCm and HIP, including code conversion, library migration, debugging, profiling, and performance portability
• A clear picture of a cloud-to-edge workflow for fine-tuning models and deploying them on AMD hardware

Prerequisites: Working knowledge of Python. For the porting module, the ability to read C/C++ and basic CUDA experience are helpful. No prior experience with AMD tools or ROCm is required.

Setup: All hands-on exercises run on hosted AMD hardware that you access through your web browser. You’ll need only a laptop with Wi-Fi and a current browser.